The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2016
Filed:
Mar. 23, 2015
Texas Instruments Incorporated, Dallas, TX (US);
Darian Robert Peter Sale, Toronto, CA;
Mandeep Singh Deol, Brampton, CA;
Paul Ian Strathdee Marshall, Lucas, TX (US);
Paul Arthur Gingrich, Toronto, CA;
Shing Fu Pang, Toronto, CA;
Victor Xi Yang, Richmond Hill, CA;
Andrew Edward Waterson, Pickering, CA;
Steven Derrick Clynes, Allen, TX (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
This invention is a signal input/output design tool for integrated circuit input/output design. The connectivity capacity of at least multiplexer connecting internal signals and external lines is expressed as a first set of Boolean expressions. The desired connectivity between internal signals and external lines is expressed is provided by a designer. A programmed general purpose computer expresses the desired connectivity as a second set of Boolean expressions and determines whether said first set of Boolean expressions and said second set of Boolean expressions are Boolean satisfiable. If satisfiable, the design tool generates control signals to configure the at least one multiplexer to achieve the desired connectivity. If not satisfiable, the design tool generates a report indicating which portions of the desired connectivity are achievable and which are not.