The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Dec. 22, 2010
Applicant:

Jon C. R. Bennett, Sudbury, MA (US);

Inventor:

Jon C. R. Bennett, Sudbury, MA (US);

Assignee:

VIOLIN MEMORY INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/14 (2006.01); G06F 13/36 (2006.01); G06F 13/16 (2006.01); G11C 19/00 (2006.01); H03K 19/17 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1684 (2013.01); G06F 13/14 (2013.01); G06F 13/36 (2013.01); G11C 19/00 (2013.01); H03K 19/17 (2013.01); Y02B 60/1228 (2013.01);
Abstract

An interconnection system, apparatus and method is described where the motherboard may be populated with less than all of the modules that it has been designed to accept while maintaining a configuration such that in the event of a module failure, a memory controller failure, or a combination thereof, the connectivity of the remaining modules is maintained. Where data is stored using a RAID organization of the memory on the modules, the data may be reconstructed to a spare module. The system also provides for the orderly incremental expansion of the memory by adding additional memory modules and memory controllers, while maintaining the connectivity properties.


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