The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Feb. 04, 2012
Applicants:

Kemal Ebcioglu, Katonah, NY (US);

Atakan Dogan, Eskisehir, TR;

Reha Oguz Altug, Eskisheir, TR;

Mikko Herman Lipasti, Lake Mills, WI (US);

Eray Özkural, Ankara, TR;

Inventors:

Kemal Ebcioglu, Katonah, NY (US);

Atakan Dogan, Eskisehir, TR;

Reha Oguz Altug, Eskisheir, TR;

Mikko Herman Lipasti, Lake Mills, WI (US);

Eray Özkural, Ankara, TR;

Assignee:

Global Supercomputing Corporation, Yorktown Heights, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 9/45533 (2013.01); G06F 15/7871 (2013.01); Y02B 60/146 (2013.01); Y02B 60/148 (2013.01);
Abstract

A parallel hypervisor system for virtualizing application-specific supercomputers is disclosed. The hypervisor system comprises (a) at least one software-virtual hardware pair consisting of a software application, and an application-specific virtual supercomputer for accelerating the said software application, wherein (i) The virtual supercomputer contains one or more virtual tiles; and (ii) The software application and the virtual tiles communicate among themselves with messages; (b) One or more reconfigurable physical tiles, wherein each virtual tile of each supercomputer can be implemented on at least one physical tile, by configuring the physical tile to perform the virtual tile's function; and (c) A scheduler implemented substantially in hardware, for parallel pre-emptive scheduling of the virtual tiles on the physical tiles.


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