The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Oct. 30, 2013
Applicant:

Qlogic, Corporation, Aliso Viejo, CA (US);

Inventors:

Kanoj Sarcar, Fremont, CA (US);

Ralph B. Campbell, San Jose, CA (US);

Daniel R. Pearson, Rocklin, CA (US);

Assignee:

QLOGIC, Corporation, Aliso Viejo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/14 (2006.01); G06F 1/04 (2006.01); G06F 1/00 (2006.01); H04L 1/18 (2006.01); H04L 29/06 (2006.01);
U.S. Cl.
CPC ...
G06F 1/14 (2013.01); H04L 1/1848 (2013.01); H04L 1/1851 (2013.01); H04L 69/28 (2013.01);
Abstract

Method and system for a device having a processor module for maintaining a connection with another device are provided. The device includes a timer module having a plurality of timers, where the resolution for each timer is maintained by one or more processor modules; and a timer state module that stores an indicator value for indicating a timer state. A timer is assigned to the connection and the processor module manages the resolution of the timer. The processor module sends a request to the timer module for arming the timer and the timer module sets the timer state as active in a first storage location maintained by the timer state module; and responds to the processor module after the timer is activated. The processor module uses the information in the response for requesting a disarm operation.


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