The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2016
Filed:
Jun. 30, 2015
Freescale Semiconductor, Inc., Austin, TX (US);
Gary L. Miller, Austin, TX (US);
David D. Barrera, Austin, TX (US);
Michael E. Gladden, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A source clock signal is received from a primary semiconductor device by a secondary semiconductor device via an interconnect. A local clock signal is generated on the secondary semiconductor device based on the source clock signal. A mode control signal is generated on the secondary semiconductor device, where the mode control signal indicates one of an unlock mode of operation and a lock mode of operation of the secondary semiconductor device. A physical interface (PHY) clock signal is generated based on the local clock signal, where the PHY clock signal includes the local clock signal during the lock mode, and the PHY clock signal includes an inverted version of the local clock signal during the unlock mode. Data received from the primary semiconductor device via the interconnect is latched at a positive edge of the PHY clock signal during the unlock mode and the lock mode.