The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2016

Filed:

Mar. 26, 2015
Applicant:

Nichia Corporation, Anan-shi, Tokushima, JP;

Inventors:

Koichi Takenaga, Anan, JP;

Hirofumi Kawaguchi, Tokushima, JP;

Kazuki Kashimoto, Tokushima, JP;

Assignee:

NICHIA CORPORATION, Anan-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 33/38 (2010.01); H01L 33/62 (2010.01); H01L 33/40 (2010.01); H01L 33/44 (2010.01); H01L 33/54 (2010.01);
U.S. Cl.
CPC ...
H01L 33/387 (2013.01); H01L 33/382 (2013.01); H01L 33/40 (2013.01); H01L 33/44 (2013.01); H01L 33/54 (2013.01); H01L 33/62 (2013.01);
Abstract

A light emitting element includes a semiconductor stacked layer body having an n-type semiconductor layer, an active layer, and a p-type semiconductor layer in this order, and a plurality of exposed portions defined at an upper surface side of the semiconductor stacked layer body, the plurality of exposed portions respectively exposing a part of the n-type semiconductor layer, a p-side electrode arranged in a first region and electrically connected with an upper surface of the p-type semiconductor layer and, arranged at one corner above the p-type semiconductor layer in a plan view, and an n-side electrode electrically integrally connected to the plurality of exposed portions and arranged in a different region in a plan view. In a plan view, the semiconductor stacked layer body has a rectangular shape and the plurality of exposed portions includes, a plurality of first exposed portions arranged at substantially equal intervals along a side of the semiconductor stacked layer body and a plurality of second exposed portions arranged closer to the p-side electrode than the first exposed portions are to the p-side electrode. The plurality of second exposed portions include at least one second exposed portion which has a shortest distance to the first exposed portions, the shortest distance to the first exposed portions being longer than a shortest distance among the first exposed portions. The at least one second exposed portion also has a shortest distance to the p-side electrode shorter than the shortest distance among the first exposed portions.


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