The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2016

Filed:

Dec. 06, 2012
Applicants:

Institute of Microelectronics, Chinese Academy of Sciences, Beijing, CN;

Shanghai Lianxing Electronics Co., Ltd., Shanghai, CN;

Jiangsu Cas-igbt Technology Co., Ltd, Jiangsu, CN;

Inventors:

Yangjun Zhu, Beijing, CN;

Wenliang Zhang, Beijing, CN;

Shuojin Lu, Beijing, CN;

Xiaoli Tian, Beijing, CN;

Aibin Hu, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 21/331 (2006.01); H01L 21/425 (2006.01); H01L 21/302 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/36 (2006.01); H01L 21/18 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0834 (2013.01); H01L 21/26513 (2013.01); H01L 21/302 (2013.01); H01L 29/0615 (2013.01); H01L 29/0821 (2013.01); H01L 29/36 (2013.01); H01L 29/66333 (2013.01); H01L 29/7395 (2013.01); H01L 21/185 (2013.01);
Abstract

A TI-IGBT, comprising a first semiconductor substrate, a second semiconductor substrate, and a first doped layer; a short circuit region and a collector region disposed in parallel are formed in the first semiconductor substrate; the short circuit region and the collector region have different doping types; the second semiconductor substrate is located on the upper surface of the first semiconductor substrate, and has the same doping type with the short circuit region; the first doped layer is located between the first semiconductor substrate and the second semiconductor substrate, and covers at least the collector region; the first doped layer has the same doping type with the second semiconductor substrate, and has a doping concentration smaller than that of the second semiconductor substrate.


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