IDiyas

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9461034 B1

PDFFull Text
Date of Patent:
Oct. 04, 2016

Filed:

Jun. 02, 2015

Composite group iii-v and group iv transistor having a switched substrate

Applicant:

Infineon Technologies Americas Corp., El Segundo, CA (US);

Inventors:

Yang Pan, Chandler, AZ (US);

Mohamed Imam, Chandler, AZ (US);

Assignee:

Infineon Technologies Americas Corp., El Segundo, CA (US);

Attorney:

Murphy, Bilak & Homiller, PLLC

Primary Examiner:

Whitney T Moore

Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/78 (2006.01); H01L 27/06 (2006.01); H01L 29/20 (2006.01); H01L 29/16 (2006.01); H01L 29/778 (2006.01); H01L 23/538 (2006.01); H01L 29/861 (2006.01); H01L 21/768 (2006.01); H01L 21/8258 (2006.01); H01L 27/07 (2006.01); H01L 27/085 (2006.01); H01L 29/10 (2006.01); H01L 29/267 (2006.01);
U.S. Cl.
CPC ...
H01L 27/027 (2013.01); H01L 21/76898 (2013.01); H01L 21/8258 (2013.01); H01L 27/0266 (2013.01); H01L 27/0617 (2013.01); H01L 27/0629 (2013.01); H01L 27/0694 (2013.01); H01L 27/0727 (2013.01); H01L 27/085 (2013.01); H01L 29/7786 (2013.01); H01L 29/8616 (2013.01); H01L 29/1075 (2013.01); H01L 29/2003 (2013.01); H01L 29/267 (2013.01); H01L 29/8611 (2013.01);
Abstract

There are disclosed herein various implementations of a group III-V composite transistor having a switched substrate. Such a group III-V composite transistor includes a composite field-effect transistor (FET) including a depletion mode group III-V high electron mobility transistor (HEMT) situated over a substrate. The depletion mode group III-V HEMT is cascoded with an enhancement mode group IV FET to produce the composite FET. The group III-V composite transistor also includes a transistor configured to selectably couple the substrate of the depletion mode group III-V HEMT to ground and to selectably decouple the substrate from ground. That transistor is configured to ground the substrate when the depletion mode group III-V HEMT is in an off-state and to cause the substrate to float when the depletion mode group III-V HEMT is in an on-state.

Find Patent Forward Citations

Loading…