The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2016

Filed:

Mar. 26, 2014
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Gabriel Padron Wells, Saratoga Springs, NY (US);

Xiang Hu, Clifton Park, NY (US);

Guillaume Bouche, Albany, NY (US);

Andre Labonte, Mechanicville, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/467 (2006.01); H01L 21/768 (2006.01); H01L 29/40 (2006.01); H01L 21/033 (2006.01); H01L 21/308 (2006.01); H01L 29/417 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/0332 (2013.01); H01L 21/3081 (2013.01); H01L 21/467 (2013.01); H01L 21/823475 (2013.01); H01L 29/401 (2013.01); H01L 29/41783 (2013.01); H01L 21/823431 (2013.01); H01L 27/088 (2013.01);
Abstract

Embodiments of the present invention provide an improved contact and method of fabrication. A dielectric layer is formed over transistor structures which include gates and source/drain regions. A first etch, which may be a reactive ion etch, is used to partially recess the dielectric layer. A second etch is then used to continue the etch of the dielectric layer to form a cavity adjacent to the gate spacers. The second etch is highly selective to the spacer material, which prevents damage to the spacers during the exposure (opening) of the source/drain regions.


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