The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2016

Filed:

Feb. 22, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Omid Rajaee, San Diego, CA (US);

Changsok Han, Gainesville, FL (US);

Liang Dai, San Diego, CA (US);

Seyed Arash Mirhaj, Los Angeles, CA (US);

Ganesh Kiran, San Diego, CA (US);

Assignee:

Qualcomm Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
H03M 3/464 (2013.01); H03M 3/38 (2013.01); H03M 3/422 (2013.01); H03M 3/496 (2013.01);
Abstract

Certain aspects of the present disclosure provide a delta-sigma modulator (DSM) using time-interleaved (TI) successive approximation register (SAR) analog-to-digital converters (ADCs). For example, two SAR ADCs may be configured to alternately sample and process an input signal and provide a feedback signal for the DSM using excess loop delay (ELD). In other aspects, the DSM may be implemented using a two-step SAR quantizer. For example, a first SAR ADC may sample an input signal to generate a most-significant bit (MSB) portion of an output of the DSM, while the second SAR ADC may subsequently sample a residue from the first SAR ADC conversion and generate a least-significant bit (LSB) portion of the output of the DSM. With these techniques, higher bandwidths may be obtained in high accuracy delta-sigma ADCs without using increased sampling rates.


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