The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2016
Filed:
Sep. 16, 2014
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Hung-Chuan Pai, Irvine, CA (US);
Gang Zhang, San Diego, CA (US);
Assignee:
QUALCOMM INCORPORATED, San Diego, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 21/02 (2006.01); H04B 1/40 (2015.01); H03K 5/133 (2014.01); H03L 7/081 (2006.01); H03L 7/16 (2006.01); H03K 23/66 (2006.01); H03K 5/00 (2006.01); H03K 5/13 (2014.01);
U.S. Cl.
CPC ...
H03K 21/02 (2013.01); H03K 23/667 (2013.01); H03L 7/081 (2013.01); H03L 7/16 (2013.01); H04B 1/40 (2013.01); H03K 5/00006 (2013.01); H03K 5/133 (2013.01);
Abstract
Aspects of a reconfigurable frequency divider circuit are provided. A reconfigurable frequency divider can include a frequency divider that is configured to receive an input signal. The frequency divider can also include a delay circuit that is configured to receive a divided signal produced by the frequency divider. The frequency divider can also include a frequency multiplier that is configured to produce an output signal based on the delayed signal produced by the delay circuit, wherein the delay circuit is configured to receive the output signal.