The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2016
Filed:
Aug. 14, 2015
Applicant:
Freescale Semiconductor, Inc., Austin, TX (US);
Inventors:
Perry H. Pelley, Austin, TX (US);
James D. Burnett, Austin, TX (US);
Assignee:
Freescale Semiconductor, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); G11C 7/18 (2006.01); G11C 7/02 (2006.01); G11C 11/412 (2006.01); G11C 5/06 (2006.01); G11C 8/16 (2006.01); H01L 21/8228 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11 (2013.01); G11C 5/063 (2013.01); G11C 7/02 (2013.01); G11C 7/18 (2013.01); G11C 8/16 (2013.01); G11C 11/412 (2013.01); H01L 21/768 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 21/8228 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A memory device includes a storage unit formed using a substrate, a true bit line BL0 for carrying a bit of data, and a complementary bit line for carrying the bit of data carried by the first true bit line in complementary form. The true bit line is coupled to the storage unit and runs laterally over the substrate. The true bit line and the complementary bit line are adjacent to each other and are vertically stacked above the substrate.