The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2016
Filed:
May. 06, 2016
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Choung-Ki Song, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/50 (2006.01); G11C 7/12 (2006.01); G11C 7/10 (2006.01); G11C 29/12 (2006.01); G11C 11/401 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 7/10 (2013.01); G11C 29/12 (2013.01); G11C 11/401 (2013.01); G11C 29/02 (2013.01); G11C 29/50 (2013.01);
Abstract
A semiconductor device may include: a plurality of data pads; a plurality of data buffers each suitable for buffering a signal inputted through a first input node using a voltage inputted through a second input node, and outputting the buffered signal; and a calibration control unit suitable for generating a test signal in a calibration mode, adjusting the level of the test signal, receiving outputs of the plurality of data buffers while adjusting the level of the test signal, and adjusting offsets of the data buffers such that the logical values of the outputs of the data buffers transit when the test signal has a target level.