The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2016

Filed:

Jun. 19, 2014
Applicants:

Texas Instruments Incorporated, Dallas, TX (US);

Texas Instruments Deutschland Gmbh, Freising, DE;

Inventors:

Andreas Waechter, Bavaria, DE;

Mark Jung, Bavaria, DE;

Steven Craig Bartling, Plano, TX (US);

Sudhanshu Khanna, Richardson, TX (US);

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1417 (2013.01); G06F 9/4401 (2013.01); G06F 11/1469 (2013.01);
Abstract

A processing device boots or wakes using non-volatile logic element (NVL) array(s) that store a machine state. A standard boot sequence is used to restore a first portion of data. A second portion of data is restored, in parallel with the standard boot sequence, from the NVL array(s). A data corruption check is performed on the second portion of data. If the second data is valid, a standard boot sequence is used to restore a third portion of data. If the second data is invalid or the boot is an initial boot, a standard boot sequence is executed to determine the second portion of data, which is then stored in the NVL array(s). The processing device restores the second portion of the data during a portion of the boot/wake process that is not reading data from other non-volatile devices to avoid overloading the respective power domain.


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