The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2016

Filed:

May. 27, 2014
Applicant:

Vivid Engineering, Inc., San Jose, CA (US);

Inventors:

Vladislav Potanin, San Jose, CA (US);

Elena Potanina, San Jose, CA (US);

Assignee:

VIVID ENGINEERING, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/575 (2006.01); G05F 1/618 (2006.01); G05F 1/46 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05F 1/618 (2013.01); G05F 1/465 (2013.01);
Abstract

Technologies are generally described for a voltage regulator implemented as an integrated circuit (IC). The voltage regulator may include a power transistor configured to receive and convert an input voltage from a voltage source to an output voltage, and a feedback loop configured to regulate the output voltage in response to a change from a desired level. The feedback loop may include an error amplifier configured to determine and amplify a value difference between the output voltage and a reference output voltage, a voltage divider configured to generate voltage proportional to the output voltage such that a ratio is the value difference, and a first unity gain buffer configured to increase stability of the IC. In some examples, the feedback loop may include a second unity gain buffer and/or an overshoot suppressor circuit configured to reduce an output voltage fluctuation when a current consumed by the load is changed suddenly.


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