The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2016
Filed:
Apr. 28, 2016
Applicant:
Stmicroelectronics SA, Montrouge, FR;
Inventor:
Pascal Fonteneau, Theys, FR;
Assignee:
STMicroelectronics SA, Montrouge, FR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/42 (2006.01); G02B 6/122 (2006.01); H01L 23/528 (2006.01); H01L 25/16 (2006.01); H01L 27/02 (2006.01); H01L 29/87 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
G02B 6/4275 (2013.01); G02B 6/122 (2013.01); G02B 6/428 (2013.01); H01L 23/49827 (2013.01); H01L 23/528 (2013.01); H01L 25/167 (2013.01); H01L 27/0255 (2013.01); H01L 27/0259 (2013.01); H01L 29/87 (2013.01);
Abstract
A device includes integrated circuit chips mounted on one another. At least one component for protecting elements of a first one of the chips is formed in a second one of the chips. Preferably, the chips are of SOI type, the second chip includes an SOI layer having a first thickness sufficient to support the component for protecting elements. The first chip also includes an SOI layer but having a second thickness smaller than the first thickness that is insufficient to support the component for protecting elements. The SOI layer of the second chip may be an optical waveguide layer.