The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Dec. 13, 2013
Applicant:

Coherent Logix, Incorporated, Austin, TX (US);

Inventors:

Carl S. Dobbs, Austin, TX (US);

Michael R. Trocino, Austin, TX (US);

Kenneth R. Faulkner, Austin, TX (US);

Christopher L. Schreppel, Austin, TX (US);

Assignee:

COHERENT LOGIX, INCORPORATED, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G08B 29/00 (2006.01); H03L 7/085 (2006.01); H03L 7/08 (2006.01); G06F 1/12 (2006.01); G06F 1/08 (2006.01); G06F 11/16 (2006.01); G06F 21/75 (2013.01); H03L 7/06 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/085 (2013.01); G06F 1/04 (2013.01); G06F 1/08 (2013.01); G06F 1/12 (2013.01); G06F 11/1604 (2013.01); G06F 21/75 (2013.01); H03L 7/06 (2013.01); H03L 7/08 (2013.01); G06F 1/10 (2013.01);
Abstract

Embodiments of a synchronous digital system are disclosed that may include generation of clock and synchronization signals. Any of a plurality of available clock signals may be selected for use as a primary clock, without causing clock-induced errors in the synchronous digital system. The clock signals may be selected automatically or programmatically. Clock generation circuitry may generate a clock signal that is initially used as the primary clock. The clock generation circuitry may be dynamically reconfigured without interrupting operation of the synchronous digital system, by first selecting another of the available clock signals for use as the primary clock.


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