The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2016
Filed:
Aug. 20, 2012
Hyeok-hwi NA, Cheongju-si Chungbuk, KR;
Young-seok Kim, Cheongju-si Chungbuk, KR;
Sang-hoon Ahn, Cheongju-si Chungbuk, KR;
Sung-beum Park, Guri-si Gyeonggi-do, KR;
Seung-wook Park, Cheonan-si Chungcheongnam-do, KR;
Hyun-mok Cho, Cheongji-si Chungbuk, KR;
Sun-bok Park, Chungbuk, KR;
Jae-goo Park, Chungbuk, KR;
Ho-suk Hwang, Gunpo-si Gyeonggi-do, KR;
Hyeok-Hwi Na, Cheongju-si Chungbuk, KR;
Young-Seok Kim, Cheongju-si Chungbuk, KR;
Sang-Hoon Ahn, Cheongju-si Chungbuk, KR;
Sung-Beum Park, Guri-si Gyeonggi-do, KR;
Seung-Wook Park, Cheonan-si Chungcheongnam-do, KR;
Hyun-Mok Cho, Cheongji-si Chungbuk, KR;
Sun-Bok Park, Chungbuk, KR;
Jae-Goo Park, Chungbuk, KR;
Ho-Suk Hwang, Gunpo-si Gyeonggi-do, KR;
ITM SEMICONDUCTOR CO., LTD., Chungbuk, KR;
Abstract
Disclosed is a package module of a battery protection circuit. The package module comprises: a first internal connection terminal area and a second internal connection terminal area, and in which first and second internal connection terminals connected to a battery can provided with a bare cell are respectively disposed; an external connection terminal area, in which a plurality of external connection terminals are disposed; and a protection circuit area comprising a device area in which a plurality of passive devices forming the battery protection circuit are disposed and a chip area, which is adjacent to the device area, and in which a protection IC and a dual FET chip forming the battery protection circuit are disposed, are disposed between the external connection terminal area and the second internal connection terminal area.