The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Oct. 10, 2014
Applicant:

Fuji Electric Co., Ltd., Kawasaki-shi, JP;

Inventors:

Hideaki Teranishi, Hachioji, JP;

Haruo Nakazawa, Matsumoto, JP;

Masaaki Ogino, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/425 (2006.01); H01L 29/66 (2006.01); H01L 21/225 (2006.01); H01L 21/761 (2006.01); H01L 21/762 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66333 (2013.01); H01L 21/2252 (2013.01); H01L 21/2253 (2013.01); H01L 21/761 (2013.01); H01L 21/762 (2013.01); H01L 29/16 (2013.01); H01L 29/66325 (2013.01);
Abstract

A method for manufacturing a silicon semiconductor substrate including a diffusion layer prior to forming a semiconductor device thereon, includes providing a silicon semiconductor substrate which is manufactured by a floating zone method; and performing thermal diffusion at a heat treatment temperature that is equal to or higher than 1290° C. and that is lower than a melting temperature of a silicon crystal to form a diffusion layer with a depth of 50 μm or more in the silicon semiconductor substrate, the thermal diffusion including a first heat treatment performed in an atmosphere consisting of oxygen or oxygen and at least one of argon, helium, or neon, followed by a second heat treatment performed in an atmosphere comprised of nitrogen or nitrogen and oxygen to form the diffusion layer. The method suppresses the occurrence of crystal defects, reduces the amount of inert gas used, and reduces manufacturing costs.


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