The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Dec. 02, 2014
Applicant:

Universal Display Corporation, Ewing, NJ (US);

Inventors:

Huiqing Pang, Bellevue, WA (US);

Peter Levermore, Lambertville, NJ (US);

Emory Krall, Philadelphia, PA (US);

Kamala Rajan, Newtown, PA (US);

Ruiqing Ma, Morristown, NJ (US);

Paul E. Burrows, Chattaroy, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/52 (2006.01); B82Y 10/00 (2011.01); H01L 23/525 (2006.01); H01L 23/528 (2006.01); H01L 51/50 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3202 (2013.01); B82Y 10/00 (2013.01); H01L 23/528 (2013.01); H01L 23/5256 (2013.01); H01L 27/3204 (2013.01); H01L 51/5012 (2013.01); H01L 51/5203 (2013.01); H01L 51/5206 (2013.01); H01L 51/5212 (2013.01); H01L 51/5221 (2013.01); H01L 51/5228 (2013.01); H01L 51/008 (2013.01); H01L 51/0046 (2013.01); H01L 51/0058 (2013.01); H01L 51/0067 (2013.01); H01L 51/0068 (2013.01); H01L 51/0072 (2013.01); H01L 51/0092 (2013.01); H01L 2051/0063 (2013.01); H01L 2251/5361 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Systems, and methods for the design and fabrication of OLEDs, including large-area OLEDs with metal bus lines, are provided. For a given panel area dimension, target luminous emittance, OLED device structure and efficiency, and electrical resistivity and thickness of the bus line material and electrode onto which the bus lines are disposed, a bus line pattern may be designed to optimize Fill Factor (FF), Luminance Uniformity (U) and Power Loss (PL). Example designs may be to maximize FF, maximize U and minimize PL. or define minimum criteria for U and a maximum criteria for PL, and then to optimize the bus line layout to maximize FF. OLED panels including bus lines with different resistances along the bus line are also described.


Find Patent Forward Citations

Loading…