The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Jun. 26, 2015
Applicant:

Renesas Electronics Corporation, Kanagawa, JP;

Inventors:

Kenichi Osada, Kawasaki, JP;

Masataka Minami, Hino, JP;

Shuji Ikeda, Koganei, JP;

Koichiro Ishibashi, Warabi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 27/11 (2006.01); G11C 11/412 (2006.01); G11C 11/417 (2006.01);
U.S. Cl.
CPC ...
G11C 11/412 (2013.01); G11C 11/417 (2013.01); H01L 27/11 (2013.01); H01L 27/1104 (2013.01); Y10S 257/904 (2013.01);
Abstract

A P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NWand are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one region is provided per group of thirty two memory cell rows or sixty four cell rows.


Find Patent Forward Citations

Loading…