The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Sep. 17, 2013
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Raashid Moin Shaikh, Bangalore, IN;

Vishnuraj Arukat Rajan, Kerala, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 17/50 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 13/4027 (2013.01); G06F 17/5077 (2013.01);
Abstract

A method of manufacturing a system on a chip and a system on a chip including a set of pre-designed modules. These modules are place on a semiconductor and connecting by a set of busses formed according to a set of design rules specifying tracks having a minimum size of conductors and a minimum spacing between conductors. The busses are routed in a preferred direction. The busses include minimum size conductors at alternate tracks within a selected metal layer of the semiconductor and minimum size conductors at alternate tracks in a different metal layer. The conductors in the different metal layer are connected to corresponding connectors in the selected metal layer by vias. Shields of conductors not connected to the bus may be included in tracks not including bus conductors.


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