The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2016
Filed:
Nov. 05, 2015
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventor:
Der-Ping Liu, Taoyuan, TW;
Assignee:
MEDIATEK INC., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G06F 3/06 (2006.01); G11C 11/408 (2006.01); G11C 8/18 (2006.01); G11C 8/06 (2006.01); G06F 13/16 (2006.01); G11C 7/10 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01); G11C 8/12 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0638 (2013.01); G06F 3/061 (2013.01); G06F 3/0673 (2013.01); G06F 12/023 (2013.01); G06F 12/06 (2013.01); G06F 13/1668 (2013.01); G11C 7/1072 (2013.01); G11C 8/06 (2013.01); G11C 8/12 (2013.01); G11C 8/18 (2013.01); G11C 11/408 (2013.01); G11C 11/4087 (2013.01); G06F 2212/70 (2013.01);
Abstract
An operating method for a memory. The method includes obtaining a first address via an address bus and a first command via a command bus from a controller, obtaining a second address via the address bus and a second command via the command bus from the controller after the first command is obtained, and combining the first address and the second address to obtain a valid address. The valid address is a row address when each of the first command and the second command is an active command, and the valid address is a column address when the second command is an access command.