The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2016

Filed:

Mar. 14, 2014
Applicant:

Commissariat À L'énergie Atomique ET Aux Énergies Alternatives, Paris, FR;

Inventors:

Hubert Bono, Grenoble, FR;

Bernard Andre, Quaix ex Chartreuse, FR;

Adrien Gasse, Seyssins, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 33/32 (2010.01); H01L 33/46 (2010.01); H01L 33/50 (2010.01); H01L 33/08 (2010.01); H01L 33/64 (2010.01);
U.S. Cl.
CPC ...
H01L 33/32 (2013.01); H01L 33/08 (2013.01); H01L 33/46 (2013.01); H01L 33/502 (2013.01); H01L 33/641 (2013.01); H01L 2933/0025 (2013.01); H01L 2933/0033 (2013.01); H01L 2933/0041 (2013.01); H01L 2933/0075 (2013.01);
Abstract

The invention relates to a process for manufacturing light-emitting diodes comprising the following steps: a) forming light-emitting diodes () on a silicon layer () of an SOI wafer (), said layer resting on a carrier (); b) bonding, on the light-emitting diode side, a silicon wafer forming a cap () equipped with a void facing each light-emitting diode; c) thinning the silicon wafer to form an aperture facing each light-emitting diode; d) filling each aperture with a transparent material (); and e) at least partially removing the carrier of the SOI wafer () and producing connecting and heat-sinking metallizations.


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