The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2016
Filed:
May. 21, 2015
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
David Roberts, Sunnyvale, CA (US);
Yasuko Eckert, Sunnyvale, CA (US);
Mitesh Meswani, Sunnyvale, CA (US);
Indrani Paul, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
Embodiments are described for a communications interconnect scheme for 3D stacked memory devices. A ring network design is used for networks of memory chips organized as individual devices with multiple dies or wafers. The design comprises a three-tier ring network where each ring serves a different set of memory blocks. One ring or set of rings interconnects memory within a die (inter-bank), a second ring or set of rings interconnects memory across die in a stack (inter-die), and the third ring or set of rings interconnects memory across stacks or chip packages (inter-stack).