The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2016
Filed:
Jun. 02, 2015
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventor:
Mustafa Ulvi Erdogan, Allen, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03L 7/087 (2006.01); H04L 7/00 (2006.01); H03L 7/089 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0807 (2013.01); H03L 7/087 (2013.01); H03L 7/089 (2013.01); H04L 7/0045 (2013.01);
Abstract
A current mode logic (CML) latch that includes a first transistor coupled to a second transistor, a third transistor coupled to a fourth transistor, a first capacitor connected to the first, second, third, and fourth transistors, and a second capacitor cross-coupled with the first capacitor and connected to the third and fourth transistors. The first and second transistors are configured to receive a data signal. The third and fourth transistors are configured to receive a clock signal.