The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Apr. 28, 2015
Applicant:

Sensirion Ag, Stafa, CH;

Inventor:

Werner Hunziker, Stafa, CH;

Assignee:

Sensirion AG, Stafa, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/29 (2006.01); H01L 21/302 (2006.01); H01L 21/56 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3185 (2013.01); B81C 1/00261 (2013.01); B81C 1/00777 (2013.01); H01L 21/302 (2013.01); H01L 21/561 (2013.01); H01L 23/293 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor package including an integrated device, the package having a front side, a back side and side walls linking the front and back sides, wherein each side wall is coated, to at least 80% of its area, with a coating material different from the material(s) of the back and front sides. A method of manufacturing a semiconductor package by providing an assembly containing an array of the packages, the assembly having thickness dand being attached to a dicing tape of thickness dd, fabricating a set of first dicing streets with width wand depth d<(d+dd), filling the first dicing streets at least partially with a coating material, and fabricating, in the coating material in each first dicing street, a second dicing street with width w≦wand depth d≧dbut <(d+dd).


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