The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Mar. 31, 2014
Applicant:

Avx Corporation, Fountain Inn, SC (US);

Inventors:

Kevin D. Christian, Myrtle Beach, SC (US);

Gheorghe Korony, Myrtle Beach, SC (US);

Assignee:

AVX Corporation, Fountain Inn, SC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 7/00 (2006.01); H01G 4/33 (2006.01); H01G 4/38 (2006.01); H01L 27/01 (2006.01);
U.S. Cl.
CPC ...
H01G 4/33 (2013.01); H01G 4/38 (2013.01); H01L 27/016 (2013.01); Y10T 29/43 (2015.01); Y10T 29/435 (2015.01);
Abstract

Disclosed are methodology for providing a precision laser adjustable (e.g., trimmable) thin film capacitor array. A plurality of individual capacitors are formed on a common substrate and connected together in parallel by way of fusible links. The individual capacitors are provided as laddered capacitance value capacitors such that a plurality of lower valued capacitors corresponding to the lower steps of the ladder, and lesser numbers of capacitors, including a single capacitor, for successive steps of the ladder, are provided. Precision capacitance values can be achieved by either of fusing or ablating selected of the fusible links so as to remove the selected subcomponents from the parallel connection. In-situ live-trimming of selected fusible links may be performed after placement of the capacitor array on a hosting printed circuit board.


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