The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Aug. 29, 2013
Applicant:

Microsoft Corporation, Redmond, WA (US);

Inventors:

Michael Love, Union City, CA (US);

Walker Robb, Seattle, WA (US);

Avdhesh Chhodavdia, Fremont, CA (US);

Paul Paternoster, Los Altos, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/71 (2013.01); G06F 21/74 (2013.01); G06F 21/75 (2013.01); G06F 21/57 (2013.01); G06F 21/62 (2013.01); G06F 21/44 (2013.01);
U.S. Cl.
CPC ...
G06F 21/629 (2013.01); G06F 21/44 (2013.01);
Abstract

A system-on-chip (SoC) is provided that includes a centralized access enablement circuit for controlling access to a plurality of security features for multiple hardware modules of the system. Progressive security states corresponding to different stages in a chip's design, manufacture and delivery are utilized to enable different access control settings for security features as a part moves from design to end-use. The access enablement circuit for a SoC implementing different security states provides individual access control settings for security features in the different security states. One-time programmable memory and register controls are provided in one embodiment that allow different access control settings for an individual security feature in the same or different security states of the system.


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