The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Sep. 13, 2012
Applicants:

Ray Marshall, Harpenden, GB;

Joseph Circello, Phoenix, AZ;

Norbert Huemmer, Munich, DE;

Inventors:

Ray Marshall, Harpenden, GB;

Joseph Circello, Phoenix, AZ;

Norbert Huemmer, Munich, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); B60R 25/00 (2013.01); G06F 21/70 (2013.01); G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); B60R 25/00 (2013.01); G06F 1/04 (2013.01); G06F 11/0721 (2013.01); G06F 21/70 (2013.01);
Abstract

An electronic device comprising a clock unit and a processing unit connected to the clock unit is described. The clock unit may deliver an output clock signal for operating the processing unit in accordance with the output clock signal. The clock unit may have: a normal mode in which the output clock signal has a low amount of jitter and a normal clock rate to enable normal use of the electronic device, and a failure analysis mode in which the output clock signal has a high amount of jitter or a reduced clock rate, or a high amount of jitter combined with a reduced clock rate, to impede the normal use. The clock unit may be protected against unauthorized re-activation of the normal mode. A method of protecting an electronic device against unauthorized use is also described.


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