The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Sep. 10, 2014
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventor:

Tomohiro Tashiro, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01); H05K 1/02 (2006.01); H05K 1/03 (2006.01); H05K 5/00 (2006.01); G02F 1/1345 (2006.01); H05K 3/32 (2006.01); G02F 1/1333 (2006.01); H05K 3/36 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0281 (2013.01); G02F 1/13452 (2013.01); H05K 1/0306 (2013.01); H05K 3/323 (2013.01); H05K 5/0017 (2013.01); G02F 2001/133302 (2013.01); H05K 1/0271 (2013.01); H05K 3/361 (2013.01); H05K 2201/068 (2013.01); H05K 2201/09154 (2013.01);
Abstract

A display device includes: a glass substrate including a driver circuit and a plurality of connection terminals that is connected to the driver circuit and is arranged in an array, and an elongated FPC, which has a plurality of panel connection terminals that correspond to the connection terminals and which is mounted on the glass substrate, wherein the FPC has a coverlay. The FPC has a chamfered-area end gap between an end portion of the coverlay facing an end face of the glass substrate and a chamfered-area end portion of the glass substrate in a mounted state, wherein the chamfered-area end gap is covered with an insulating resin, and wherein the chamfered-area end gap at a center portion of the FPC is narrower than the chamfered-area end gap at both end portions of the FPC.


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