The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Dec. 31, 2015
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

James Bryan Northcutt, Lehigh Acres, FL (US);

Eugene Stanley Trefethen, Fort Myers, FL (US);

Harry LeRoy Sutter, Cape Coral, FL (US);

Stephen Amar Tibbitts, Spanaway, WA (US);

Charles Michael Rice, Cape Coral, FL (US);

Bruce Edward Clark, Puyallup, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/04 (2006.01); H03B 5/32 (2006.01); H03H 9/10 (2006.01); H03H 9/13 (2006.01); H03H 9/205 (2006.01);
U.S. Cl.
CPC ...
H03B 5/04 (2013.01); H03B 5/32 (2013.01); H03H 9/10 (2013.01); H03H 9/13 (2013.01); H03H 9/205 (2013.01);
Abstract

An integrated circuit device includes a pair of serially-connected crystal resonators arranged as a first crystal resonator, which is configured to preferentially support a fundamental resonance mode in response to an input signal, and a second crystal resonator, which is configured to preferentially support a third or higher overtone resonance mode in response to a signal generated at an output terminal of the first crystal resonator. A negative impedance converter (NIC) is also provided, which has an input terminal electrically connected to an input terminal of the first crystal resonator and an output terminal electrically connected to one of the output terminal of the first crystal resonator and the output terminal of the second crystal resonator. The NIC may be a CMOS-based NIC that is devoid of inductive reactance from a passive inductor.


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