The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Apr. 27, 2015
Applicant:

Institute of Microelectronics, Chinese Academy of Sciences, Beijing, CN;

Inventors:

Huaxiang Yin, Beijing, CN;

Yongkui Zhang, Beijing, CN;

Zhiguo Zhao, Beijing, CN;

Zhiyong Lu, Beijing, CN;

Huilong Zhu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4916 (2013.01); H01L 21/823412 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823468 (2013.01); H01L 27/0886 (2013.01); H01L 29/1083 (2013.01); H01L 29/66492 (2013.01); H01L 29/66537 (2013.01); H01L 29/66545 (2013.01); H01L 21/26586 (2013.01);
Abstract

A semiconductor device is provided that has a plurality of Fin structures extending on a substrate along a first direction; a gate stack structure extending on the substrate along a second direction and across the plurality of Fin structures, wherein the gate stack structure comprises a gate conductive layer and a gate insulating layer, and the gate conductive layer is formed by a doped poly-semiconductor; trench regions in the plurality of Fin structures and beneath the gate stack structure; and source/drain regions on the plurality of Fin structures and at both sides of the gate stack structure along the first direction. A method of manufacturing a semiconductor device is also provided.


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