The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2016
Filed:
Oct. 22, 2015
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Nam Kyun Park, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 27/10 (2006.01); H01L 27/22 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/12 (2006.01); H01L 43/06 (2006.01); H01L 45/00 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2454 (2013.01); H01L 21/823487 (2013.01); H01L 27/101 (2013.01); H01L 27/228 (2013.01); H01L 27/2463 (2013.01); H01L 29/42356 (2013.01); H01L 29/42372 (2013.01); H01L 29/45 (2013.01); H01L 29/495 (2013.01); H01L 29/4975 (2013.01); H01L 29/66484 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01); H01L 29/7833 (2013.01); H01L 29/7834 (2013.01); H01L 29/7835 (2013.01); H01L 43/02 (2013.01); H01L 43/06 (2013.01); H01L 43/08 (2013.01); H01L 43/12 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/141 (2013.01); H01L 45/149 (2013.01); H01L 45/1608 (2013.01);
Abstract
A resistance variable memory device including a vertical transistor includes an active pillar including a channel region, a source formed in one end of the channel region, and a lightly doped drain (LDD) region and a drain formed in the other end of the channel region, a first gate electrode formed to surround a periphery of the LDD region and having a first work function, and a second gate electrode formed to be connected to the first gate electrode and to surround the channel region and having a second work function that is higher than the first work function.