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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9431458 B1

PDFFull Text
Date of Patent:
Aug. 30, 2016

Filed:

Dec. 28, 2015

Semiconductor devices and methods of manufacturing the same

Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Jin-Woo Lee, Hwaseong-Si, KR;

Youn-Seon Kang, Yongin-Si, KR;

Jung-Moo Lee, Hwaseong-Si, KR;

Seung-Jae Jung, Suwon-Si, KR;

Hyun-Su Ju, Hwaseong-Si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:

Volentine & Whitt, PLLC

Primary Examiner:

Dao H Nguyen

Int. Cl.
CPC ...
H01L 47/00 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2409 (2013.01); H01L 27/2463 (2013.01); H01L 27/2481 (2013.01); H01L 45/04 (2013.01); H01L 45/085 (2013.01); H01L 45/1226 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/142 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); H01L 45/1675 (2013.01); H01L 27/249 (2013.01); H01L 45/1616 (2013.01);
Abstract

A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.

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