The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Aug. 31, 2015
Applicant:

National Tsing Hua University, Hsinchu, TW;

Inventors:

Meng-Fan Chang, Taichung, TW;

Yu-Lin Chen, Tainan, TW;

Chia-Yin Li, Taipei, TW;

Tien-Fu Chen, Hsinchu, TW;

Keng-Hao Yang, Chiayi County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/06 (2006.01); G11C 11/4091 (2006.01); G11C 11/16 (2006.01); G11C 13/00 (2006.01); G11C 11/419 (2006.01); G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/062 (2013.01); G11C 7/12 (2013.01); G11C 11/1673 (2013.01); G11C 11/4091 (2013.01); G11C 11/419 (2013.01); G11C 13/004 (2013.01); G11C 13/0004 (2013.01);
Abstract

The present disclosure provides a memory apparatus including a memory cell array, a plurality of sense amplifiers, at least one first comparing circuit, and a plurality of second comparing circuit. The memory cell array includes a plurality of memory cells. Each of the sense amplifier generates a data signal and an inverted data signal according to a bit line signal and an inverted bit line signal. The first comparing circuits compares the data signals of first and second sense amplifiers with a first tag to generate a first comparing result. The second comparing circuits respectively compare a plurality of second tags with the data signals of the sense amplifiers to respectively generate a plurality of second comparing results.


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