The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Mar. 12, 2015
Applicant:

Fuji Electric Co., Ltd., Kawasaki-shi, JP;

Inventors:

Mutsuo Nishikawa, Matsumoto, JP;

Kazuhiro Matsunami, Matsumoto, JP;

Yuko Fujimoto, Shiojiri, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/36 (2006.01); G11C 5/06 (2006.01); G11C 7/00 (2006.01); G11C 7/24 (2006.01); G11C 16/06 (2006.01); G11C 16/10 (2006.01); G11C 16/12 (2006.01); G11C 16/22 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G11C 5/06 (2013.01); G11C 7/00 (2013.01); G11C 7/24 (2013.01); G11C 16/06 (2013.01); G11C 16/10 (2013.01); G11C 16/12 (2013.01); G11C 16/22 (2013.01); G11C 16/30 (2013.01);
Abstract

A semiconductor integrated circuit that exhibits an enhanced surge withstand voltage of a nonvolatile memory and has a reduced chip area, having a nonvolatile memory and a Zener diode connected in parallel between a write terminal and a ground terminal. The nonvolatile memory is connected to the write terminal by a write terminal line and to a common connection point by a first ground line. The cathode of the Zener diode is connected to the write terminal line. The anode of the Zener diode is connected to the specified connection point by a second ground line. The first ground line and the second ground line are connected to the specified connection point.


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