The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Jul. 25, 2013
Applicant:

Broadcom Corporation, Irvine, CA (US);

Inventors:

Chih-Tsung Hsieh, Taipei, TW;

Hao-zheng Lee, Taipei, TW;

Walid Nabhane, Long Valley, NJ (US);

Veronica Alarcon, San Jose, CA (US);

Mark Norman Fullerton, Austin, TX (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 11/10 (2006.01); G05F 1/625 (2006.01); G06F 13/12 (2006.01); G01R 31/36 (2006.01); H02J 7/00 (2006.01); G06F 1/32 (2006.01); G11C 7/10 (2006.01); G06F 11/30 (2006.01); G01R 31/40 (2014.01); G01R 19/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1048 (2013.01); G01R 31/36 (2013.01); G05F 1/625 (2013.01); G06F 1/26 (2013.01); G06F 1/3206 (2013.01); G06F 1/3287 (2013.01); G06F 11/1016 (2013.01); G06F 11/3062 (2013.01); G06F 11/3093 (2013.01); G06F 13/126 (2013.01); G11C 7/106 (2013.01); G11C 7/1072 (2013.01); H02J 7/0029 (2013.01); G01R 19/003 (2013.01); G01R 31/40 (2013.01); G06F 11/3031 (2013.01); G06F 11/3058 (2013.01); Y02B 60/1282 (2013.01);
Abstract

Aspects of power mode register reduction and power rail bring up enhancements are described. In one embodiment, an operating parameter for a first power rail is set by power management circuit according to a predetermined programmed setting. In connection with a wait time, the power rail is enabled, and a processor is released to start. In turn, at least one of a command to modify the operating parameter for the first power rail or a command to set an operating parameter for a second power rail is received from the processor over a high speed interface. By accessing a grouped operating register for a group of power rails, the processor can update or modify settings of an entire group of power rails at one time. In connection with the processor, the power management circuit can power up a plurality of power rails in a flexible and efficient manner.


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