The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Mar. 13, 2015
Applicant:

Vmware, Inc., Palo Alto, CA (US);

Inventor:

Puneet Zaroo, Santa Clara, CA (US);

Assignee:

VMware, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 9/50 (2006.01); G06F 9/48 (2006.01); G06F 11/34 (2006.01); G06F 12/08 (2016.01);
U.S. Cl.
CPC ...
G06F 9/50 (2013.01); G06F 9/48 (2013.01); G06F 9/4881 (2013.01); G06F 9/505 (2013.01); G06F 9/5005 (2013.01); G06F 9/5011 (2013.01); G06F 9/5016 (2013.01); G06F 9/5022 (2013.01); G06F 9/5027 (2013.01); G06F 9/5033 (2013.01); G06F 9/5044 (2013.01); G06F 9/5055 (2013.01); G06F 11/3409 (2013.01); G06F 11/3442 (2013.01); G06F 11/3452 (2013.01); G06F 12/08 (2013.01); G06F 12/0802 (2013.01); G06F 12/084 (2013.01); G06F 12/0804 (2013.01); G06F 12/0806 (2013.01); G06F 12/0815 (2013.01); G06F 11/3466 (2013.01); G06F 2201/88 (2013.01); G06F 2209/483 (2013.01); G06F 2209/501 (2013.01);
Abstract

A method includes assigning a thread performance counter to threads being created in the computing environment, the thread performance counter measuring a number of cache misses for a corresponding thread. The method also includes calculating a self-thread value S as a change in the thread performance counter of a given thread during a predetermined period, calculating an other-thread value O as a sum of changes in all the thread performance counters during the predetermined period minus S, and calculating an estimation adjustment value associated with a first probability that a second set of cache misses for the corresponding thread replace a cache area currently occupied by the corresponding thread. The method also includes estimating a cache occupancy for the thread based on a previous occupancy for the thread, S, O, and the estimation adjustment value, and assigning computing environment resources to the thread based on the estimated cache occupancy.


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