Transistor with charge enhanced field plate structure and method

Abstract

Transistors and methods of fabricating are described herein. These transistors include a field plate () and a charged dielectric layer () overlapping at least a portion of a gate electrode (). The field plate () and charged dielectric layer () provide the ability to modulate the electric field or capacitance in the transistor. For example, the charged dielectric layer () provides the ability to control the capacitance between the gate electrode () and field plate (). Modulating such capacitances or the electric field in transistors can facilitate improved performance. For example, controlling gate electrode () to field plate () capacitance can be used to improve device linearity and/or breakdown voltage. Such control over gate electrode () to field plate () capacitance or electric fields provides for high speed and/or high voltage transistor operation.