The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2016

Filed:

Mar. 14, 2013
Applicant:

Soitec, Crolles Cedex, FR;

Inventors:

Nadia Ben Mohamed, Renage, FR;

Carole David, Crolles, FR;

Camille Rigal, Marseille, FR;

Assignee:

SOITEC, Barnin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/20 (2006.01); H01L 21/18 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76254 (2013.01); H01L 21/187 (2013.01); H01L 21/2007 (2013.01); H01L 21/26506 (2013.01); H01L 21/26586 (2013.01); H01L 21/76251 (2013.01); H01L 21/76259 (2013.01);
Abstract

The disclosure relates to a method for implantation of atomic or ionic species into a batch of substrates made of semiconductor material, in which: each substrate made of semiconductor material is positioned on a respective support of a batch implanter, each substrate comprising a thin layer of electrical insulator on its surface; and a dose of at least one ionic or atomic species is implanted over the whole surface of the substrates, through their layer of insulator, so as to form a fragilization region within each substrate and to bound there a thin layer of semiconductor material between the thin layer of insulator and the fragilization region of the substrate, the implantation method being characterized in that, during the method, each support on which a substrate is positioned has at least two separate inclinations with respect to the plane orthogonal to the direction of implantation of the species in order to improve the implantation depth of the species in the substrate. The disclosure also relates to structures of the semiconductor-on-insulator type obtained by the implementation of the implantation method.


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