The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2016
Filed:
Apr. 15, 2015
Applicant:
Mitsubishi Electric Corporation, Chiyoda-ku, JP;
Inventors:
Assignee:
MITSUBISHI ELECTRIC CORPORATION, Chiyoda-ku, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 25/16 (2006.01); H01L 25/00 (2006.01); B22D 19/00 (2006.01); B22D 21/04 (2006.01); H01L 23/00 (2006.01); H01L 23/24 (2006.01); H01L 23/31 (2006.01); H01L 23/373 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4821 (2013.01); B22D 19/00 (2013.01); B22D 21/04 (2013.01); H01L 23/49811 (2013.01); H01L 24/49 (2013.01); H01L 25/162 (2013.01); H01L 25/50 (2013.01); H01L 23/24 (2013.01); H01L 23/3121 (2013.01); H01L 23/3735 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19107 (2013.01);
Abstract
A semiconductor device includes an insulating substrate, a wiring pattern formed on the insulating substrate, a semiconductor chip secured to the wiring pattern, a junction terminal formed of the same material as the wiring pattern and electrically connected to the semiconductor chip, one end of the junction terminal being secured to the insulating substrate, the other end of the junction terminal extending upward away from the insulating substrate, and a control circuit for transmitting a control signal for the semiconductor chip, the control circuit being electrically connected to the junction terminal.