The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2016
Filed:
Apr. 15, 2014
Applicant:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Inventors:
John Kalamatianos, Arlington, MA (US);
Johnsy Kanjirapallil John, Acton, MA (US);
Phillip E. Nevius, Arlington, MA (US);
Robert G. Gelinas, Needham, MA (US);
Assignee:
ADVANCED MICRO DEVICES, INC., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/44 (2006.01); G06F 12/08 (2016.01); G06F 12/12 (2016.01); G06F 11/10 (2006.01); G11C 15/00 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0864 (2013.01); G06F 12/121 (2013.01); G11C 29/4401 (2013.01); G06F 11/1064 (2013.01); G06F 12/0802 (2013.01); G06F 12/0811 (2013.01); G06F 12/0873 (2013.01); G06F 12/0888 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/28 (2013.01); G06F 2212/283 (2013.01); G06F 2212/284 (2013.01); G06F 2212/403 (2013.01); G06F 2212/69 (2013.01); G11C 15/00 (2013.01); G11C 29/44 (2013.01); G11C 2029/0409 (2013.01);
Abstract
A method of managing cache memory includes accessing a cache memory at a primary index that corresponds to an address specified in an access request. A determination is made that accessing the cache memory at the primary index does not result in a cache hit on a cache line with an error-free status. In response to this determination, the primary index is mapped to a secondary index and data for the address is written to a cache line at the secondary index.