The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2016

Filed:

Feb. 08, 2011
Applicants:

Virendra J. Marathe, Florence, MA (US);

Aleksandar Dragojević, Lausanne, CH;

Tito L. Autrey, Iii, Champaign, IL (US);

Inventors:

Virendra J. Marathe, Florence, MA (US);

Aleksandar Dragojević, Lausanne, CH;

Tito L. Autrey, III, Champaign, IL (US);

Assignee:

Oracle International Corporation, Redwood City, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
G06F 8/4442 (2013.01);
Abstract

Systems and methods for optimizing transactional memory operations may employ static analysis of source code and static caching of memory objects to elide redundant transactional accesses. For example, a compiler (or an optimizer thereof) may be configured to analyze code that includes an atomic transaction to determine if any read accesses to shared memory locations are dominated by a previous read or write access to the same locations and/or any write accesses to shared memory locations are post-dominated by a subsequent write access to the same locations. Any access within a transaction that is determined to be redundant (e.g., any access other than the first read of a given shared memory location from within the transaction or the last write to a given shared memory location from within the transaction) may be replaced (by the compiler/optimizer) with a non-transactional access to a cached shadow copy of the shared memory location.


Find Patent Forward Citations

Marathe, Virendra. (2016). System and method for optimizing software transactional memory operations using static caching of memory objects (U.S. Patent No. 9424015). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9424015

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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