The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2016

Filed:

Mar. 15, 2013
Applicants:

Korea Advanced Institute of Science and Technology, Daejeon, KR;

Terasquare Co., Ltd., Seoul, KR;

Inventors:

Hyeon Min Bae, Seoul, KR;

Tae Hun Yoon, Daejeon, KR;

Jin Ho Park, Seoul, KR;

Tae Ho Kim, Daejeon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/04 (2006.01); H03K 19/173 (2006.01); H04L 25/02 (2006.01);
U.S. Cl.
CPC ...
H04J 3/04 (2013.01); H03K 19/1737 (2013.01); H04L 25/0286 (2013.01);
Abstract

Exemplary embodiments of the present invention relate to a low-power current mode logic (CML)-less transmitter architecture. A transmitter comprises a main multiplexer configured to generate a main data signal by multiplexing parallel main data signals retimed from a retimer for time margin between parallel input data signals and a multiphase clock signals from a clock distributor, a secondary multiplexer configured to generate a post data signal by multiplexing parallel post data signals retimed from the retimer, and a plurality of output drivers configured to generate a serial data signal by summing the main data signal and the post data signal.


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