The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Dec. 13, 2010
Applicants:
Seiichi Ozawa, Wako, JP;
Hironobu Akita, Chiyoda-ku, JP;
Inventors:
Seiichi Ozawa, Wako, JP;
Hironobu Akita, Chiyoda-ku, JP;
Assignee:
THINE ELECTRONICS, INC., Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); G09G 3/20 (2006.01); G09G 3/36 (2006.01); H04L 25/02 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G09G 3/3611 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/08 (2013.01); G09G 2370/08 (2013.01); H04L 25/0264 (2013.01);
Abstract
Reception devicestoare arranged one-dimensionally in this order. The reception devicehas a data input buffer, a first clock input buffer, and a first clock output buffer. The first clock input bufferbuffers a clock input to the first clock terminals Pand P, and outputs it to the first clock output buffer. The first clock output bufferbuffers a clock input from the first clock input bufferand outputs it from the second clock terminals Pand P. The data input terminals Pand Pare located between the first clock terminal and the second clock terminal.