The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Mar. 07, 2014
Sony Corporation, Tokyo, JP;
Jim Rasmusson, Vellinge, SE;
Håkan Jonsson, Malmö, SE;
Jonas Gustavsson, Iomma, SE;
Anders Isberg, Lund, SE;
Sony Corporation, Tokyo, JP;
Abstract
A method is disclosed of utilizing a plurality of Arithmetic Logic Units (ALUs) of an array processor. It is determined that a first quantity of the ALUs are scheduled to execute a function during a given processing cycle, with each ALU being scheduled to use a respective one of a plurality of selected input vectors as an input. It is also determined that a second quantity of the ALUs are not scheduled for use during the given processing cycle. A plurality of predicted future input vectors that differ from the plurality of selected input vectors are determined. The second quantity of ALUs are scheduled to execute the function during the given processing cycle using respective ones of the plurality of predicted future input vectors as inputs. After completion of the processing cycle, function outputs received from the first and second quantity of ALUs are cached.