The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Apr. 19, 2013
Siemens Corporation, Orlando, FL (US);
Arquimedes Martinez Canedo, Princeton, NJ (US);
Thomas Feichtinger, Monmouth Junction, NJ (US);
Mohammad Abdullah Al Faruque, Irvine, CA (US);
Siemens Aktiengesellschaft, Munich, DE;
Abstract
A method for performing time-slack pipeline balancing for multi/many-core programmable logic controllers includes performing a runtime analysis of a plurality of pipeline stages of a program for a multi/many-core programmable logic controller (PLC) while the program is being executed, and of a plurality of system services, to compile a profile of performance statistics of the PLC program and the system services, calculating a time slack for each of the plurality of pipeline stages of the PLC program using the profile of performance statistics, and for all pipeline stages except a longest stage, donating the time slack of each pipeline stage to an operating system of the PLC. Donating the time slack of each pipeline stage includes generating donor code that includes a set of instructions that free a processor core for a given pipeline stage for a time period identified as the time slack period.