The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2016
Filed:
Jul. 09, 2015
Applicant:
Synaptics Display Devices Gk, Nakano-Ku, Tokyo, JP;
Inventors:
Mitsunori Takanashi, Tokyo, JP;
Ryo Endo, Tokyo, JP;
Assignee:
Synaptics Display Devices GK, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H04L 7/00 (2006.01); H03L 7/10 (2006.01); H03L 7/107 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0004 (2013.01); H03L 7/10 (2013.01); H03L 7/1075 (2013.01); H04L 7/0025 (2013.01); H04L 7/033 (2013.01);
Abstract
A clock data recovery (CDR) circuit is provided with a circuit that updates a locked oscillation frequency, with a small loop gain, after phase lock based on a phase-locked loop circuit for a frequency-locked frequency is completed by a frequency-locked loop circuit or during a phase lock operation. Since the locked oscillation frequency is updated with a small loop gain, it is possible to correct a fluctuation in a frequency of an oscillation circuit in the frequency-locked loop circuit without oscillating a phase-locked loop undesirably even during a phase lock operation.