The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

Dec. 19, 2013
Applicant:

Analog Devices Global, Hamilton, BM;

Inventors:

Hyman Shanan, Franklin Park, NJ (US);

Michael F. Keaveney, Lisnagry, IE;

Assignee:

ANALOG DEVICES GLOBAL, Hamilton, BM;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/099 (2006.01); H03L 7/085 (2006.01);
U.S. Cl.
CPC ...
H03L 7/099 (2013.01); H03L 7/085 (2013.01);
Abstract

Apparatus and methods for frequency lock enhancement of phase-locked loops (PLLs) are provided. In one aspect, a PLL can include a VCO and a calibration voltage generation circuit that can generate a calibration voltage for controlling a tuning voltage input of the VCO when the VCO is being coarsely tuned. Additionally, the calibration voltage generation circuit can sense a temperature of the PLL, and can control a voltage level of the calibration voltage to provide compensation based on the sensed temperature. The calibration voltage generation circuit can include a bandgap reference circuit configured to generate a zero-to-absolute-temperature (ZTAT) current and a proportional-to-absolute temperature (PTAT) current, and the calibration voltage can be generated based in part on a difference between the PTAT current and the ZTAT current.


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